Semiconductor device models, such as transistor models, are vital in achieving reliable performance from circuit designs using semiconductor devices. Moreover, semiconductor device models can significantly increase the efficiency of the circuit design process. As such, it is desirable to ensure the accuracy of such semiconductor device models.
Conventional methods for generating semiconductor device models typically include building a “model card” (also referred to simply as a “model” in the present application) for the semiconductor device by extracting device parameters from a measured data set. Simulation data provided by the semiconductor device model is then compared to measured data obtained from fabricated semiconductor devices to verify the accuracy of the semiconductor device model. However, due to time and cost constraints, the measured data that is utilized for semiconductor device model verification in a conventional model verification process is typically obtained from a relatively small number of fabricated semiconductor devices. Consequently, the conventional semiconductor device model verification process may not provide sufficient assurance of semiconductor device model accuracy.